Scientists at technology giant IBM have achieved a breakthrough in memory storage.
The team were able, for the first time, to demonstrate storage of 3 bits of data per cell using a technique called phase-change memory (PCM).
While PCM memory isn’t new and has been slowly improved over the last decade. The team at IBMs success comes from being able to demonstrate a reliable process for storage that could work outside of existing commercial lab applications.
PCM memory has not used inside the consumer market so far because of its cost. If IBM is able to decrease production costs, then PCM memory could theoretically replace all existing memory inside a computer system.
Currently, computers use a mix of memory, from small amounts of very fast DRAM, which lose data when powered down, too hard drives with large pools of slow memory that will work even when powered off. Engineers currently different types of memory storage for various jobs within a machine.
Different Types of Memory
PCM memory offers a radically different approach. Relying on the concept of “Universal Memory“. Instead of having DRAM and storage separate a device would share one big pool of storage that could combine the advantages of the speeds of RAM with the longevity of hard-drive storage.
PCM would not lose data when powered off, unlike DRAM, and it can endure at least 10 million write cycles. An average flash USB stick tops out at 3,000 write cycles.
Long term “Universal Memory” would mean a computer would mean all files would be accessible in a single read/write command. Instead of having to load a file into its RAM memory before accessing it – potentially offering significant increases in speed.
However, the team at IBM envisage that in the short term that PCM could be used to within hybrid applications. Combining existing flash storage with PCM.
This could mean, for example, a laptop’s operating system could be stored within the PCM allowing it to boot within a few seconds. Or large databases could have access to PCM to allow time-critical online applications in the financial sector to run queries at lightning speeds.
In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-change memory (PCM) is one such NVM technology that possesses highly desirable features and has reached an advanced level of maturity through intensive research and development in the past decade. Multilevel-cell (MLC) capability, i.e., storage of two bits per cell or more, is not only desirable as it reduces the effective cost per storage capacity, but a necessary feature for the competitiveness of PCM against the incumbent technologies, namely DRAM and Flash memory. MLC storage in PCM, however, is seriously challenged by phenomena such as cell variability, intrinsic noise, and resistance drift. We present a collection of advanced circuit-level solutions to the above challenges, and demonstrate the viability of MLC PCM at the array level. Notably, we demonstrate reliable storage and moderate data retention of 2 bits/cell PCM, on a 64 k cell array, at elevated temperatures and after 1 million SET/RESET endurance cycles. Under similar operating conditions, we also show feasibility of 3 bits/cell PCM, for the first time ever.